This invention relates generally to the field of magnetic data storage devices, and more particularly, but not by way of limitation, to an apparatus and method for accelerating servo control calculations of an actuator for a disc drive.
Disc drives are used as primary data storage devices in modern computer systems and networks. A typical disc drive comprises a head-disc assembly (HDA) which houses mechanical portions of the drive, and a printed circuit board (PCB) mounted to an outer surface of the HDA which supports electronic circuitry used to control the HDA.
Typically, an HDA comprises one or more magnetic discs that are affixed to and rotated by a spindle motor at a constant high speed and an actuator assembly, which supports an array of heads adjacent tracks defined on the disc surfaces. The surface of each disc is a data recording surface divided into a series of generally concentric recording tracks radially spaced across a band having an inner diameter and an outer diameter. The data tracks extend around the disc and store data within the tracks on the disc surfaces in the form of magnetic flux transitions. The flux transitions are induced by an array of transducers, otherwise commonly called read/write heads or heads. Typically, each data track is divided into a number of data sectors that store fixed sized data blocks.
The head includes an interactive element such as a magnetic transducer, which senses the magnetic transitions on a selected data track to read the data stored on the track. Alternatively. the head transmits an electrical signal that induces magnetic transitions on the selected data track to write data to the track. As is known in the art, each read/write head is mounted to a rotary actuator arm and is selectively positionable by the actuator arm over a selected data track of the disc to either read data from or write data to the selected data track. Each head includes a slider assembly with an air-bearing surface that causes the read/write head to fly above the disc surface. The air bearing is developed as a result of load forces applied to the read/write head by a load arm interacting with air currents that are produced by rotation of the disc.
An actuator motor, such as a voice coil motor (VCM), rotates the actuator assembly, and hence the heads, across the disc surfaces. The control circuitry on the PCB includes a read/write channel which interfaces with the heads to transfer data between the tracks and a host computer, and a servo control system which drives the VCM to provide head positional control, based on the information contained in the servo field.
Continued demand for disc drives with ever increasing levels of data storage capacity and data throughput have led disc drive manufacturers to seek ways to increase the storage capacity of each disc surface and improve operating efficiencies of the disc drive. High performance disc drives of the present generation typically achieve areal bit densities measured in several gigabits per square centimeter, Gbits/cm2. Higher recording densities can be achieved by increasing the number of bits stored along each track, and/or by increasing the number of tracks per unit width across each disc. Storing more bits along each track generally requires improvements in the read/write channel electronics to enable the data to be written (and subsequently read) at a correspondingly higher frequency. Providing higher track densities generally requires improvements in the servo control system to enable the heads to be more precisely positioned over the discs. Improved operating efficiencies or throughput performance, for any given bit density, results from reduced cycle times in performing functions or through elimination and/or incorporation of functions internal to each other.
Throughput performance is enhanced during read/write cycles by stabilizing the servo systems ability to hold the head on track under adverse conditions such as an occurrence of: servo field thermal asperity; rotational vibration; resonance of rigid bodies at frequencies sympathetic to the servo frequencies; or components of runout, velocity and acceleration (commonly referred to as RVA) drifting out of tolerance.
To improve on track performance and improved short seek performance for disc drives of higher track densities, manufacturers of disc drives have expanded both the types of servo strategies employed and the complexity involved with those strategies. As a result, performing calculations for the servo control in high-performance disc drives requires an ever-increasing amount of processing horsepower. As a frame rates and track densities continue to increase, the demand for processing power also increases. This continual need for more MIPS (millions of instructions per second) necessitates rapid turning of the design to obtain an ever-faster processor and places pressure on an organization""s development resources.
While improvements in a drive""s servo system performance have been made by incorporating servo response enhancements, requirements for calculation of servo task specific algorithms commensurate with those strategies have grown in complexity, frequency and multiplicity. However, implementation of complex servo strategies for cutting-edge high performance disc drives has been limited by processor processing speeds. Servo response enhancements such as: notch filters; single and dual stage observers; state variable feedback control; H-infinity; H-infinity with anti-windup; single and dual stage seamless servo controllers have been developed and implemented to facilitate ever increasing track densities. Adaptation of those strategies into disc drives necessarily includes requirements for calculation of servo specific algorithms commensurate with those strategies. Examples of the types of processor intensive servo specific algorithms include: velocity profiled generation; single and dual-stage model reference seeks; once and twice around calculations; 10-tap RV feed-forward; and calculations of piezo plant voltage values and differences.
Implementation of any given servo enhancement technique, coupled with its appropriate servo specific algorithm, typically placed burdens on the processor that are well within the service capabilities of the processor. However, the demand on processor calculation resources that accompany simultaneous inclusion of a number of servo enhancement techniques, taxes the ability of processor to service both the servo system and non-servo system requirements placed on processor by a disc drive. As such, challenges remain and a need persists for the capability of performing servo calculations fast enough to sustain the processing requirements for several drive generations.
The present invention provides an apparatus for and method of accelerating calculations of servo control loop values for expanding control processor utility in improving data transfer throughput performance by resolving resource impeded, control processor embedded, multiply-accumulate hardware.
In accordance with preferred embodiments, a disc drive is provided with a rotatable actuator which supports an array of read/write heads adjacent a corresponding number of recording surfaces in a rotatable disc stack. A control processor providing closed loop servo control of the rotatable actuator and a multiply-accumulate hardware core of a micro servo engine providing servo control loop values to the control processor within one clock cycle of the disc drive for carrying out seek and track following control modes of a rotatable actuator.
In a preferred embodiment the actuator is characterized as a dual-stage actuator having both a primary actuator motor (VCM), which controllably moves all heads simultaneously, and an array of secondary microactuator motors which controllably move each head individually. The servo control loop values for the motor or motors are determined in relation to an actual position signal for the head, a desired position signal or target track seek request from the control processor and a set of control limits. The control limits are developed by measuring voltage output responses for each microactuator in response to voltage inputs applied to the individual microactuators and seek performance of the actuator during the manufacturing process. The use of a different set of control limits by head enables the control processor to be adapted for each head disc combination. That is, as each new head is selected, a new set of control limits appropriate for the new head are loaded into a volatile memory of the servo engine thereby providing accurate, adaptive control.
As adjustments are needed to align a head to a data track, whether seeking to a new track or adjusting the head position to the data track during track following, specific servo control loop values must be determined and supplied to the control processor firmware for execution of the adjustments. The servo control loop values commonly result from performing arithmetic operations on sum-of-products type arguments. To perform the sum-of-products servo control loop value calculations, a preferred embodiment of the present invention provides a servo micro engine that includes a multiply-accumulate hardware core specifically constructed using a pipeline with stages for fetch, read, multiply, accumulate, and write-back to fully utilize all of the hardware during every clock cycle.
Although multiply-accumulate hardware is often available in a typical control processor, its performance is often limited by the ability to keep the multiply-accumulate hardware busy. Limited numbers of registers and limited memory bandwidth conspire to limit the throughput. Such processors also lacked sufficiently large multipliers, which limits the precision of the calculation, or impacts performance if extra precision is maintained. The inclusion by an embodiment of the multiply-accumulate hardware core of the present invention of ample registers, memory and large multipliers resolve the performance degradation issues associated with using multiply-accumulate hardware supported within typical control processors.
In addressing limitations of primary processor based multiply-accumulate hardware, the multiply-accumulate hardware core of the present invention has adequate precision and saturation capabilities and includes dedicated memory with sufficient memory bandwidth to keep the multiply-accumulate hardware core fed with data.
These and various other features and advantages which characterize the present invention will be apparent from a reading of the following detailed description and a review of the associated drawings.